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Taijie electronics teaches you to reduce single and double-sided patch failures

Article source:NewsEditor:Dongguan Taijie Electronic Technology Co., Ltd Issuing time:2021-09-28

Manufacturing process, handling and printed circuit assembly (PCA) testing will put a lot of mechanical stress on the package, resulting in failure. As the grid array package becomes larger and larger, how to set the security level for these steps becomes more and more difficult.
For many years, the monotonic bending point test method is a typical feature of packaging. The test is described in IPC / jedec-9702 monotonic bending characteristics of horizontal interconnection of boards. This test method describes the breaking strength of printed circuit board horizontal interconnection under bending load. However, this test method cannot determine the maximum allowable tension.
For the manufacturing process and assembly process, especially for lead-free PCA, one of the challenges is that the stress on the solder joint can not be measured directly. The most widely used measure to describe the risk of interconnected components is the tension of the printed circuit board adjacent to the component, which is described in IPC / jedec-9704 guide to strain testing of printed circuit boards.
Several years ago, Intel realized this problem and began to develop a different test strategy to reproduce the worst bending situation in practice. Other companies such as Hewlett Packard also realized the benefits of other testing methods and began to consider ideas similar to Intel. This method has attracted more and more interest as more and more chip manufacturers and customers realize the important value of determining the tension limit to minimize mechanical failures in the process of manufacturing, handling and testing.
With the expansion of the use of lead-free equipment, users are more and more interested; Because many users are facing quality problems.
With the increasing interest of all parties, IPC feels it necessary to help other companies develop various test methods that can ensure that BGA is not damaged during manufacturing and testing. This work is jointly carried out by IPC 6-10d SMT accessory reliability test method working group and JEDEC jc-14.1 packaging equipment reliability test method sub committee. This work has been completed.
The test method specifies eight contact points arranged in a circular array. The PCA with a BGA installed in the center of the printed circuit board is placed in such a way that the component is installed on the support pin face down, and the load is applied to the back of the BGA. Place the strain gauge adjacent to the component according to the recommended gauge layout of IPC / jedec-9704.
PCA will be bent to relevant tension levels, and the damage degree caused by bending to these tension levels can be determined through fault analysis. The tension level without damage can be determined by iterative method, which is the tension limit.